ALU-based Built-In Self Test Generator for Transition Fault Testing

Voyiatzis, Y. ; Kranitis, N. ; Paschalis, A. ; Gizopoulos, D. ; Halatsis, Constantin (2002)

Working Paper

The detection of transition faults in high-speed CMOS circuits if favored by the application of Single Input Change (SIC) pairs of patterns. A novel ALU-based SIC pair Generation (ASG) algorithm is presented that can be easily implemented using an ALU and a barrel shifter. Since such functional modules are common in the datapath of RISC processor cores embedded in Systems on Chip (SoC), we can utilize the processor by executing a specific test pattern generation routine to generate SIC pairs for testing at-speed other cores of the SoC.

Except where otherwise noted, this item's license is described as