Performance analysis of interconnection networks of a modified model for synchronous multiprocessors

Pombortsis, A. ; Halatsis, Constantin (1986-02-13)

Article

The letter presents an analysis of a modified model for synchronous multiprocessor systems. In this model, besides the shared memory modules, each processor has a private memory. The memory references of each processor are not uniformly distributed among the memory modules. The interconnection network is considered to be either a crossbar or a shared bus. Published in:

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